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PI90LV386/PI90LVT386
High-Speed Differential Line Receivers
Features
* Sixteen line receivers meet or exceed the requirements of the ANSI TIA/EIA-644-1995 Standard * Designed for signaling rates up to 660 Mbps * 0V to 3V common-mode input voltage range * Operates from a single 3.3V supply * Typical propagation delay time: 2.6ns * Output skew 100ps (typical) * Part-to-part skew is less than 1ns * Integrated 110-Ohm termination on PI90LVT386 * Low Voltage TTL (LVTTL) levels are 5V tolerant * Open-circuit fail safe * Flow-through pin out * Packaging (Pb-free & Green available): - 64-Pin Thin Shrink Small Output TSSOP (A)
Description
The PI90LVx386 family consists of sixteen differential line receivers with 3-state outputs that implement Low-Voltage Differential Signaling (LVDS). Any of the differential receivers will provide a valid logical output state with a 100mV differential input voltage within the input common-mode voltage range that allows 0 to 3V of ground potential difference between two LVDS nodes. The independent EN pins can be used to place the outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In highimpedance state, outputs neither load nor drive the bus lines. The intended application of these devices, and their signaling techniques, is for point-to-point baseband data transmission over controlled impedance media of approximately 100-ohms with a 100-Ohm termination resistor. The PI90LVT386 integrates the terminating resistors while the PI90LV386 requires external resistors. The transmission media may be printed circuit board traces, backplanes, or cables. The PI90LV386's 16 receivers integrated into the same substrate allow precise timing alignment. These parts are characterized for operation from -40C to 85C.
1RIN1+ 1RIN1- 1RIN2+ 1RIN2- 1RIN3+ 1RIN3- 1RIN4+ 1RIN4- 2RIN1+ 2RIN1- 2RIN2- 2RIN2- 2RIN3+ 2RIN3- 2RIN4+ 2RIN4- 3RIN1+ 3RIN1- 3RIN2+ 3RIN2- 3RIN3+ 3RIN3- 3RIN4+ 3RIN4- 4RIN1+ 4RIN1- 4RIN2+ 4RIN2- 4RIN3+ 4RIN3- 4RIN4+ 4RIN4- 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 64 63 62 61 60 59 58 57 56 55 54 53 52 GND VCC VCC GND EN1 1ROUT1 1ROUT2 1ROUT3 1ROUT4 EN2 2ROUT1 2ROUT2 2ROUT3 2ROUT4 GND VCC VCC GND 3ROUT1 3ROUT2 3ROUT3 3ROUT4 EN3 4ROUT1 4ROUT2 4ROUT3 4ROUT4 EN4 GND VCC VCC GND
Pin Configuration
Block Diagram
64-Pin A
51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33
16 Receivers
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PI90LV386/PI90LVT386 High-Speed Differential Line Receivers
Absolute Maximum Ratings Over Operating Free-Air Temperature
(unless otherwise noted) Supply Voltage Range, VDD(1) ....................................... -0.5V to 4V Voltage Range: ............................................... Enables or ROUT -0.5V to VDD +2V RIN+ or RIN- ........................................................................ -0.5V to 4V Electrostatic Discharge(2): RIN+, RIN-, and GND ....................... Class 3, A: 10kV, B:700V All Pins .............................................. Class 3, A: 8kV, B:600V Storage Temperature Range ............................. -65C to 150C Lead Temperature 1, 6mm (1/16 inch) from case for 10 seconds .................................................... 260C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "Recommended Operating Conditions" is not implied. Exposure to Absolute-Maximum-Rated conditions for extended periods may affect device reliability. Notes: 1. All voltage values, except differential I/O bus voltages, are with respect to ground terminal. 2. Tested in accordance with MIL-STD-883C Method 3015.7
Function Table
Diffe re ntial Input RIN VID 100mV -100mV < VID 100mV VID -100mV X Open X Enable s EN H H H L H H Output ROUT H ? L Z H ROUT0
Notes: H = high level, L = low level, X = irrelevent Z = high impedance (off), ? = indeterminate
Recommended Operating Conditions
M in. Supply Voltage, VCC High- Level Input Voltage, VIH Low- Level Input Voltage, VIL Magnitude of Differential Input Voltage VID Common- Mode input Voltage, VIC Operating free- air temperature, TA 0.1 VID 2 3.0 2.0 0.8 0.6 2.4 -VID 2 VCC -0.8 -40 85 C V Nom. 3.3 M ax. 3.6 Units
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PI90LV386/PI90LVT386 High-Speed Differential Line Receivers
Electrical Characteristics Over Recommended Operating Conditions (unless otherwise noted)
Symbol VITH+ VITH- VOH VOL ICC Parame te r Positive- going differential input voltage threshold Negative- going differential input voltage threshold High- level output voltage Low- level output voltage Supply Current IOH = -8mA IOL = 8mA Enabled, No load Disabled LV II Input Current (RIN+ or RIN- inputs) LVT II(OFF) IIH IIL IOZ CIN Z(t) Power- off input current (RIN+ or RIN- inputs) High- level input current (enables) Low- level input current (enables) High- impedance output current Input capacitance (RIN+ or RIN- inputs to GND) Termination Impedance (LVT) VI = 0V VI = 2.4V VI = 0V, other input open VI = 2.4V, other input open VCC = 0V, VIH =2V VIL =0.8V VO = 0V VO = 3.6V VID = 0.4 sin 2.5E09 t V 6 88 110 14 3 VI = 2.4V -2.4 12 20 10 1 10 pF Ohms A -1.2 -40 -100 2.4 3.1 0.3 40 0.45 56 3 -2 0 Te s t Conditions M in. Typ.(1) M ax. 100 Units mV
V
mA
Note: 1. All typical values are at 25C and with a 3.3V supply.
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PS8574B
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PI90LV386/PI90LVT386 High-Speed Differential Line Receivers
Switching Characteristics Over Recommended Operating Conditions (unless otherwise noted)
Symbol tPLH tPHL tr tf tsk(p) tsk(o) tsk(pp) tPZH tPZL tPHZ tPLZ fMAX Parame te r Propagation delay time, low- to- high- level output Propagation delay time, high- to- low- level output Differential output signal rise time Differential output signal fall time Pulse skew (tPHL - tPLH) Output skew(2) Part- to- part skew(3) Propagation delay time, high- impedance- to- high- level output Propagation delay time, high- impedance- to- low- level output Propagation delay time, high- level- to- high- impedance output Propagation delay time, low- level- to- high- impedance output Maximum Clock frequency 300 See Figure 3(4) 2.5 4.8 3.7 6.4 See Figure 2 Te s t Conditions M in. 1 1 500 500 Typ.(1) 2.2 2.1 900 820 120 180 M ax. 3.1 3.1 1500 1200 244 320 1 3.7 6.7 5.3 8.7 MHz ns ps Units ns
Notes: 1. All typical values are at 25C and with a 3.3V supply 2. tsk(o) is the magnitude of the time difference between the tPLH or tPHL of all drivers of a single device with all of their inputs connected together. 3. tsk(pp) is the magnitude of the difference in propagation delay times between any specified terminals of two devices when both devices operate with the same supply voltages, at the same temperature, and have identical packages and test circuits. 4. ROUT0 disable time is 1 nanosecond greater.
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PS8574B
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PI90LV386/PI90LVT386 High-Speed Differential Line Receivers
Parameter Measurement Information
RIN+ VIRIN+ + VIRIN- 2 VIRIN+ VIC RIN- VIRIN- VO
VID
Figure 1. Voltage Definitions
Table 1. Receiver Minimum and Maximum Input Threshold Test Voltages
Applie d Voltage s VIRIN+ 1.25V 1.15V 2.4V 2.3V 0 . 1V 0V 1.5V 0.9V 2.4V 1.8V 0.6V 0V VIRIN- 1.15V 1.25V 2.3V 2.4V 0V 0.1V 0.9V 1.5V 1.8V 2.4V 0V 0.6V Re s ulting Diffe re ntial Input Voltage VID 100mV -100mV 100mV -100mV 100mV -100mV 600mV -600mV 600mV -600mV 600mV -600mV Re s ulting CommonM ode Input Voltage VIC 1.2V 1.2V 2.35V 2.35V 0.05V 0.05V 1.2V 1.2V 2.1V 2.1V 0.3V 0.3V
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PI90LV386/PI90LVT386 High-Speed Differential Line Receivers
Parameter Measurement Information
VID VIRIN+ CL 10pF VIRIN- VO
VIRIN+ VIRIN-
1.4V
1V
VID
0.4V
0V
-0.4V tPHL tPLH
VO
2.4V 0.4V tf tr
0V 1.4V VOL
Figure 2. Timing Test Circuit and Waveforms
Note: 1. All input pulses are supplied by a generator having the following characteristics: tr or tf 1ns, Pulse Repetition Rate (PRR) = 50 Mpps, Pulse width = 10 0.2ns. C L includes instrumentation and fixture capacitance within 0.06m of the D.U.T.
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PS8574B
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PI90LV386/PI90LVT386 High-Speed Differential Line Receivers
Parameter Measurement Information
RIN- 500 Ohms RIN+ Inputs EN
1.2V
CL 10pF
VO
+ -
VTEST
Note: 1. All input pulses are supplied by a generator having the following characteristics: tr or tf 1ns, Pulse Repetition Rate (PRR) = 0.5 Mpps, pulse width = 500 10ns. CL includes instrumentation and fixture capacitance within 0.06m of the D.U.T. 2.5V VTEST
RIN+
1V
2V EN 1.4V 0.8V tPZL tPLZ 2.5V ROUT VOL+0.5V 1.4V VOL 0V
VTEST RIN+
1.4V
2V EN 1.4V 0.8V tPZH VOL-0.5V ROUT tPHZ VOH 1.4V VOL
Figure 3. Enable/Disable Test Circuit and Waveforms
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PS8574B
10/04/04
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PI90LV386/PI90LVT386 High-Speed Differential Line Receivers
Packaging Mechanical: 64-Pin TSSOP (A)
64
.236 .244
6.0 6.2
1
.665 .673
16.9 17.1 1.20 .047 Max. SEATING PLANE
0.45 .018 0.75 .030 .319 BSC 8.1
.004 .008 0.09 0.20
.004 0.10
.0197 BSC 0.50 .007 0.17 .011 0.27 X.XX DENOTES DIMENSIONS X.XX IN MILLIMETERS .002 .006 0.05 0.15
Ordering Information
Ordering Code PI90LV368A PI90LV368AE PI90LVT368A PI90LVT368AE Package Code A A A A Package Type 64-pin TSSOP Pb-free & Green, 64-pin TSSOP 64-pin TSSOP Pb-free & Green, 64-pin TSSOP
Notes: 1. Thermal characteristics can be found on the company web site at www.pericom.com/packaging/ 2. X = Tape and reel
Pericom Semiconductor Corporation * 1-800-435-2336 * www.pericom.com
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PS8574B 10/04/04

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